Sunday, June 3, 2007

Reclocking

Searching the forums I found someone has nicely put how reclocling should be done.
My opinion is that #3 is the only clean way to go, but #5 is best price/value performance (how it is usualy done) - also Mr Kusunoki described this method (comment on his article: since this method is not 100%, transports sound differently).


1.) Get rid of the problem right at the source, e.g. the player. The player and the DACs would be fed from the same local low-jitter clock. PSU design and clock distribution scheme would be optimized to have the lowest jitter possible at the DAC, while the jitter at the rest of the circuit isn't that important.

For external DACs, we either have to isolate the timing of incoming signal from the timing of the DAC chip, or recover the original clock better than usual.

2.) Design a high quality PLL which recovers the original clock better than a simple CS841x receiver chip. The Pass Labs D1 (service manual available from their site) is a nice example of a good implementation of this technique.

3.) Let the input data stream fill a FIFO buffer. The DAC is fed from a local low-jitter clock and the data comes from the buffer. Due to the separate transport and DAC clocks, the buffer will empty or fill up slowly, depending on which clock is faster. Thus, we must provide some means to slightly "tune" the local clock source to keep the buffer about half filled.

4.) Use an ASRC to complete isolate the timing of input data stream and DAC chip. This approach is cheap and easy, but there are some caveats.

5.) Asynchronous reclocking right before the DAC. A nice idea, cheap to implement and it works good.

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